ispLSI1016
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Sun Apr 29 15:21:45 2001
LCD_1016.rpt generated using Lattice pDS Version 2.61
Part: ispLSI1016-60LJ44
Design Name: LCDMDA
Design Revision: 0.2
Author: T.Wagner
Project Name: LCDMDA
Description: Steuerchip für LCD-MDA mit µP-Integration
Verify Status: Complete
Route Status: Complete
Data Used: Post-Route
Global Resource Utilization Summary
--------------------------------------------------------------------------
Number of GLB cells used: 9
Number of IO cells used: 32
Number of dedicated inputs used: 4
Number of external nets used: 38
Number of GLB clocks used: 1
Number of IO clocks used: 0
External I/O Pin Report
--------------------------------------------------------------------------
Fixed
Before
Pin Number Pad Name Route Pin Type Pullup
1 GND Yes Gnd
2 IPIN_I3 Yes Input Yes
3 APIN_WERAM Yes Output No
4 APIN_CERAM Yes Output No
5 APIN_OERAM Yes Output No
6 APIN_OEDRV Yes Output No
7 APIN_A9 Yes Output No
8 APIN_A8 Yes Output No
9 APIN_A11 Yes Output No
10 APIN_A10 Yes Output No
11 IPIN_CLK Yes Input No
12 VCC Yes Vcc
14 IPIN_I0 Yes Input Yes
15 XAD19 Yes Input No
16 XAD18 Yes Input No
17 XAD17 Yes Input No
18 XAD15 Yes Input No
19 XAD16 Yes Input No
20 XAD13 Yes Input No
21 XAD14 Yes Input No
22 XAD12 Yes Input No
23 GND Yes Gnd
24 IPIN_I1 Yes Input Yes
25 IPIN_UPREQ Yes Input No
26 APIN_GREEN Yes Output No
27 IPIN_DMY Yes Input Yes
28 APIN_RED Yes Output No
29 APIN_UPENA Yes Output No
30 XMEMWR Yes Input No
31 XALE Yes Input No
32 XMEMRD Yes Input No
34 VCC Yes Vcc
35 XRESET No Input No
36 IPIN_I2 Yes Input Yes
37 APIN_A0 Yes Output No
38 APIN_A2 Yes Output No
39 APIN_A1 Yes Output No
40 APIN_A3 Yes Output No
41 APIN_A4 Yes Output No
42 APIN_A5 Yes Output No
43 APIN_A6 Yes Output No
44 APIN_A7 Yes Output No
LDE Report
--------------------------------------------------------------------------
STATISTICS FOR GLB A1, USERNAME: D_FF, ROUTED LOCATION: A2
GLB Input List:
I3 : PCRAM
I8 : UPREQ
RESET : !RESET
GLB Output List:
O0 : UPRAM
CELL EQUATIONS:
UPRAM.D = VCC;
UPRAM.PTCLK = UPREQ;
UPRAM.RE = PCRAM;
AND Usage for GLB:
UPRAM : 0000|0000|00000|1000000
PT Clock for Register : 0000|0000|00001|0000000
PT Reset for Register : 0000|0000|00000|0000001
OUTPUT Slot Usage for GLB:
UPRAM : SINGLPT0001 OR0000 XOR0000 INV0000 4PTBYP0000 REG0001
STATISTICS FOR GLB A7, ROUTED LOCATION: A4
GLB Input List:
IN0 : I0
IN1 : I1
GLB Output List:
O0 : IN01
CELL EQUATIONS:
IN01 = I1 & I0;
AND Usage for GLB:
IN01 : 0000|0000|00000|1000000
OUTPUT Slot Usage for GLB:
IN01 : SINGLPT0001 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
STATISTICS FOR GLB A0_part1, USERNAME: LO_1, ROUTED LOCATION: B0
GLB Input List:
I2 : !MEMWR
I7 : UPRAM
GLB Output List:
O0 : WERAM
CELL EQUATIONS:
WERAM = !UPRAM & MEMWR;
AND Usage for GLB:
WERAM : 0000|0000|00000|1000000
OUTPUT Slot Usage for GLB:
WERAM : SINGLPT0001 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
STATISTICS FOR GLB A0_part2, USERNAME: LO_1, ROUTED LOCATION: A0
GLB Input List:
I0 : IN01
I4 : IN23
I8 : UPRAM
I10 : DMY
I13 : !MEMWR
GLB Output List:
O1 : LED_GREEN
O3 : LED_RED
CELL EQUATIONS:
LED_RED = DMY & IN01 & IN23 & !UPRAM & MEMWR;
LED_GREEN = UPRAM;
AND Usage for GLB:
LED_GREEN : 0000|0000|10000|0000000
LED_RED : 1000|0000|00000|0000000
OUTPUT Slot Usage for GLB:
LED_GREEN : SINGLPT0010 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
LED_RED : SINGLPT1000 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
STATISTICS FOR GLB B0, USERNAME: LO_2, ROUTED LOCATION: B4
GLB Input List:
I0 : !MEMRD
I1 : !ALE
I7 : UPRAM
I8 : AD12
I9 : AD14
I10 : AD13
I11 : AD16
I12 : AD15
I13 : AD17
I14 : AD18
I15 : AD19
GLB Output List:
O1 : CERAM
O2 : !OERAM
O3 : PCRAM
OE : EN_CP
CELL EQUATIONS:
EN_CP = UPRAM;
!OERAM = !MEMRD & !UPRAM;
PCRAM = ALE & AD19 & !AD18 & AD17 & AD16 & !AD15 & !AD14 & !AD13 & !AD12;
CERAM = (ALE & AD19 & !AD18 & AD17 & AD16 & !AD15 & !AD14 & !AD13 & !AD12)
# (UPRAM);
AND Usage for GLB:
CERAM : 0110|0000|00000|0000000
!OERAM : 0000|1000|00000|0000000
PCRAM : 1000|0000|00000|0000000
EN_CP : 0000|0000|00000|0000001
OUTPUT Slot Usage for GLB:
CERAM : SINGLPT0000 OR0010 XOR0000 INV0000 4PTBYP0000 REG0000
!OERAM : SINGLPT0100 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
PCRAM : SINGLPT1000 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
STATISTICS FOR GLB B1, ROUTED LOCATION: B1
GLB Input List:
IN0 : I2
IN1 : I3
GLB Output List:
O0 : IN23
CELL EQUATIONS:
IN23 = I3 & I2;
AND Usage for GLB:
IN23 : 0000|0000|00000|1000000
OUTPUT Slot Usage for GLB:
IN23 : SINGLPT0001 OR0000 XOR0000 INV0000 4PTBYP0000 REG0000
STATISTICS FOR GLB B5, USERNAME: CT_T3, ROUTED LOCATION: B3
GLB Input List:
I2 : Q8
I3 : Q9
I4 : Q7
I5 : Q6
I6 : Q5
I7 : Q4
I8 : Q3
I9 : Q1
I10 : Q2
I11 : Q0
I16 : Q11
I17 : Q10
CLK0 : CLK
RESET : !RESET
GLB Output List:
O0 : Q9
O1 : Q8
O2 : Q11
O3 : Q10
CELL EQUATIONS:
Q8.D = (Q7 & Q6 & Q5 & Q4 & Q3 & Q2 & Q1 & Q0) $$ (Q8.Q);
Q8.CLK = CLK;
Q9.D = (Q8.Q & Q7 & Q6 & Q5 & Q4 & Q3 & Q2 & Q1 & Q0) $$ (Q9.Q);
Q9.CLK = CLK;
Q10.D = (Q9.Q & Q8.Q & Q7 & Q6 & Q5 & Q4 & Q3 & Q2 & Q1 & Q0) $$ (Q10.Q);
Q10.CLK = CLK;
Q11.D = (Q10.Q & Q9.Q & Q8.Q & Q7 & Q6 & Q5 & Q4 & Q3 & Q2 & Q1 & Q0) $$
(Q11.Q);
Q11.CLK = CLK;
AND Usage for GLB:
Q9$$L : 0000|0000|00000|1000000
Q9$$R : 0000|0000|01000|0000000
Q8$$L : 0000|0000|10000|0000000
Q8$$R : 0000|0000|00000|0100000
Q11$$L : 0000|1000|00000|0000000
Q11$$R : 0000|0100|00000|0000000
Q10$$L : 1000|0000|00000|0000000
Q10$$R : 0100|0000|00000|0000000
OUTPUT Slot Usage for GLB:
Q9 : SINGLPT0001 OR0001 XOR0001 INV0000 4PTBYP0000 REG0001
Q8 : SINGLPT0010 OR0010 XOR0010 INV0000 4PTBYP0000 REG0010
Q11 : SINGLPT0100 OR0100 XOR0100 INV0000 4PTBYP0000 REG0100
Q10 : SINGLPT1000 OR1000 XOR1000 INV0000 4PTBYP0000 REG1000
STATISTICS FOR GLB B6, USERNAME: CT_T2, ROUTED LOCATION: B2
GLB Input List:
I6 : Q5
I7 : Q4
I8 : Q3
I9 : Q1
I10 : Q2
I11 : Q0
I16 : Q6
I17 : Q7
CLK0 : CLK
RESET : !RESET
GLB Output List:
O0 : Q4
O1 : Q5
O2 : Q6
O3 : Q7
CELL EQUATIONS:
Q4.D = (Q3 & Q2 & Q1 & Q0) $$ (Q4.Q);
Q4.CLK = CLK;
Q5.D = (Q4.Q & Q3 & Q2 & Q1 & Q0) $$ (Q5.Q);
Q5.CLK = CLK;
Q6.D = (Q5.Q & Q4.Q & Q3 & Q2 & Q1 & Q0) $$ (Q6.Q);
Q6.CLK = CLK;
Q7.D = (Q6.Q & Q5.Q & Q4.Q & Q3 & Q2 & Q1 & Q0) $$ (Q7.Q);
Q7.CLK = CLK;
AND Usage for GLB:
Q4$$L : 0000|0000|00000|1000000
Q4$$R : 0000|0000|00000|0100000
Q5$$L : 0000|0000|10000|0000000
Q5$$R : 0000|0000|01000|0000000
Q6$$L : 0000|1000|00000|0000000
Q6$$R : 0100|0000|00000|0000000
Q7$$L : 1000|0000|00000|0000000
Q7$$R : 0000|0100|00000|0000000
OUTPUT Slot Usage for GLB:
Q4 : SINGLPT0001 OR0001 XOR0001 INV0000 4PTBYP0000 REG0001
Q5 : SINGLPT0010 OR0010 XOR0010 INV0000 4PTBYP0000 REG0010
Q6 : SINGLPT0100 OR0100 XOR0100 INV0000 4PTBYP0000 REG0100
Q7 : SINGLPT1000 OR1000 XOR1000 INV0000 4PTBYP0000 REG1000
STATISTICS FOR GLB B7, USERNAME: CT_T1, ROUTED LOCATION: B5
GLB Input List:
I9 : Q1
I11 : Q0
I16 : Q2
I17 : Q3
CLK0 : CLK
RESET : !RESET
GLB Output List:
O0 : Q0
O1 : Q2
O2 : Q1
O3 : Q3
CELL EQUATIONS:
Q0.D = !Q0.Q;
Q0.CLK = CLK;
Q1.D = (Q0.Q) $$ (Q1.Q);
Q1.CLK = CLK;
Q2.D = (Q1.Q & Q0.Q) $$ (Q2.Q);
Q2.CLK = CLK;
Q3.D = (Q2.Q & Q1.Q & Q0.Q) $$ (Q3.Q);
Q3.CLK = CLK;
AND Usage for GLB:
Q0 : 0000|0000|00000|1000000
Q2$$L : 0000|0000|10000|0000000
Q2$$R : 0100|0000|00000|0000000
Q1$$L : 0000|1000|00000|0000000
Q1$$R : 0000|0000|01000|0000000
Q3$$L : 1000|0000|00000|0000000
Q3$$R : 0000|0100|00000|0000000
OUTPUT Slot Usage for GLB:
Q0 : SINGLPT0001 OR0000 XOR0000 INV0000 4PTBYP0000 REG0001
Q2 : SINGLPT0010 OR0010 XOR0010 INV0000 4PTBYP0000 REG0010
Q1 : SINGLPT0100 OR0100 XOR0100 INV0000 4PTBYP0000 REG0100
Q3 : SINGLPT1000 OR1000 XOR1000 INV0000 4PTBYP0000 REG1000
STATISTICS FOR DIRIN I0, ROUTED LOCATION: I0
DIRIN Input List:
PAD : IPIN_I0
DIRIN Output List:
OUT : I0
CELL EQUATIONS:
XPIN I IPIN_I0 LOCK 14 PULLUP;
IB11(I0, IPIN_I0);
STATISTICS FOR DIRIN I1, ROUTED LOCATION: I1
DIRIN Input List:
PAD : IPIN_I1
DIRIN Output List:
OUT : I1
CELL EQUATIONS:
XPIN I IPIN_I1 LOCK 24 PULLUP;
IB11(I1, IPIN_I1);
STATISTICS FOR DIRIN I2, USERNAME: I2, ROUTED LOCATION: I2
DIRIN Input List:
PAD : IPIN_I2
DIRIN Output List:
OUT : I2
CELL EQUATIONS:
XPIN I IPIN_I2 LOCK 36 PULLUP;
IB11(I2, IPIN_I2);
STATISTICS FOR DIRIN I3, ROUTED LOCATION: I3
DIRIN Input List:
PAD : IPIN_I3
DIRIN Output List:
OUT : I3
CELL EQUATIONS:
XPIN I IPIN_I3 LOCK 2 PULLUP;
IB11(I3, IPIN_I3);
STATISTICS FOR IOC IO0, USERNAME: A12, ROUTED LOCATION: IO7
IOC Input List:
PAD : XAD12
IOC Output List:
OUT : AD12
CELL EQUATIONS:
XPIN IO XAD12 LOCK 22;
IB11(AD12, XAD12);
STATISTICS FOR IOC IO1, USERNAME: A13, ROUTED LOCATION: IO5
IOC Input List:
PAD : XAD13
IOC Output List:
OUT : AD13
CELL EQUATIONS:
XPIN IO XAD13 LOCK 20;
IB11(AD13, XAD13);
STATISTICS FOR IOC IO2, USERNAME: A14, ROUTED LOCATION: IO6
IOC Input List:
PAD : XAD14
IOC Output List:
OUT : AD14
CELL EQUATIONS:
XPIN IO XAD14 LOCK 21;
IB11(AD14, XAD14);
STATISTICS FOR IOC IO3, USERNAME: A15, ROUTED LOCATION: IO3
IOC Input List:
PAD : XAD15
IOC Output List:
OUT : AD15
CELL EQUATIONS:
XPIN IO XAD15 LOCK 18;
IB11(AD15, XAD15);
STATISTICS FOR IOC IO4, USERNAME: A16, ROUTED LOCATION: IO4
IOC Input List:
PAD : XAD16
IOC Output List:
OUT : AD16
CELL EQUATIONS:
XPIN IO XAD16 LOCK 19;
IB11(AD16, XAD16);
STATISTICS FOR IOC IO5, USERNAME: A17, ROUTED LOCATION: IO2
IOC Input List:
PAD : XAD17
IOC Output List:
OUT : AD17
CELL EQUATIONS:
XPIN IO XAD17 LOCK 17;
IB11(AD17, XAD17);
STATISTICS FOR IOC IO6, USERNAME: A18, ROUTED LOCATION: IO1
IOC Input List:
PAD : XAD18
IOC Output List:
OUT : AD18
CELL EQUATIONS:
XPIN IO XAD18 LOCK 16;
IB11(AD18, XAD18);
STATISTICS FOR IOC IO7, USERNAME: A19, ROUTED LOCATION: IO0
IOC Input List:
PAD : XAD19
IOC Output List:
OUT : AD19
CELL EQUATIONS:
XPIN IO XAD19 LOCK 15;
IB11(AD19, XAD19);
STATISTICS FOR IOC IO8, USERNAME: REQ, ROUTED LOCATION: IO8
IOC Input List:
PAD : IPIN_UPREQ
IOC Output List:
OUT : UPREQ
CELL EQUATIONS:
XPIN IO IPIN_UPREQ LOCK 25;
IB11(UPREQ, IPIN_UPREQ);
STATISTICS FOR IOC IO9, ROUTED LOCATION: IO10
IOC Input List:
PAD : IPIN_DMY
IOC Output List:
OUT : DMY
CELL EQUATIONS:
XPIN IO IPIN_DMY LOCK 27 PULLUP;
IB11(DMY, IPIN_DMY);
STATISTICS FOR IOC IO10, USERNAME: AUE, ROUTED LOCATION: IO12
IOC Input List:
IMUX : UPRAM
IOC Output List:
PAD : APIN_UPENA
CELL EQUATIONS:
XPIN IO APIN_UPENA LOCK 29;
OB11(APIN_UPENA, UPRAM);
STATISTICS FOR IOC IO11, USERNAME: RED, ROUTED LOCATION: IO11
IOC Input List:
IMUX : LED_RED
IOC Output List:
PAD : APIN_RED
CELL EQUATIONS:
XPIN IO APIN_RED LOCK 28;
OB21(APIN_RED, LED_RED);
STATISTICS FOR IOC IO12, USERNAME: GREEN, ROUTED LOCATION: IO9
IOC Input List:
IMUX : LED_GREEN
IOC Output List:
PAD : APIN_GREEN
CELL EQUATIONS:
XPIN IO APIN_GREEN LOCK 26;
OB21(APIN_GREEN, LED_GREEN);
STATISTICS FOR IOC IO13, USERNAME: MWR, ROUTED LOCATION: IO13
IOC Input List:
PAD : XMEMWR
IOC Output List:
OUT : !MEMWR
CELL EQUATIONS:
XPIN IO XMEMWR LOCK 30;
IB11(!MEMWR, XMEMWR);
STATISTICS FOR IOC IO14, USERNAME: MRD, ROUTED LOCATION: IO15
IOC Input List:
PAD : XMEMRD
IOC Output List:
OUT : !MEMRD
CELL EQUATIONS:
XPIN IO XMEMRD LOCK 32;
IB11(!MEMRD, XMEMRD);
STATISTICS FOR IOC IO15, USERNAME: ALE, ROUTED LOCATION: IO14
IOC Input List:
PAD : XALE
IOC Output List:
OUT : !ALE
CELL EQUATIONS:
XPIN IO XALE LOCK 31;
IB11(!ALE, XALE);
STATISTICS FOR IOC IO16, USERNAME: OEDRV, ROUTED LOCATION: IO27
IOC Input List:
IMUX : PCRAM
IOC Output List:
PAD : APIN_OEDRV
CELL EQUATIONS:
XPIN IO APIN_OEDRV LOCK 6;
OB21(APIN_OEDRV, PCRAM);
STATISTICS FOR IOC IO17, USERNAME: WERAM, ROUTED LOCATION: IO24
IOC Input List:
IMUX : WERAM
IOC Output List:
PAD : APIN_WERAM
CELL EQUATIONS:
XPIN IO APIN_WERAM LOCK 3;
OB21(APIN_WERAM, WERAM);
STATISTICS FOR IOC IO18, USERNAME: CERAM, ROUTED LOCATION: IO25
IOC Input List:
IMUX : CERAM
IOC Output List:
PAD : APIN_CERAM
CELL EQUATIONS:
XPIN IO APIN_CERAM LOCK 4;
OB21(APIN_CERAM, CERAM);
STATISTICS FOR IOC IO19, USERNAME: OERAM, ROUTED LOCATION: IO26
IOC Input List:
IMUX : !OERAM
IOC Output List:
PAD : APIN_OERAM
CELL EQUATIONS:
XPIN IO APIN_OERAM LOCK 5;
OB11(APIN_OERAM, !OERAM);
STATISTICS FOR IOC IO20, USERNAME: RA11, ROUTED LOCATION: IO30
IOC Input List:
IMUX : Q11
OE : EN_CP
IOC Output List:
PAD : APIN_A11
CELL EQUATIONS:
XPIN IO APIN_A11 LOCK 9;
OT11(APIN_A11, Q11, EN_CP);
STATISTICS FOR IOC IO21, USERNAME: RA10, ROUTED LOCATION: IO31
IOC Input List:
IMUX : Q10
OE : EN_CP
IOC Output List:
PAD : APIN_A10
CELL EQUATIONS:
XPIN IO APIN_A10 LOCK 10;
OT11(APIN_A10, Q10, EN_CP);
STATISTICS FOR IOC IO22, USERNAME: RA9, ROUTED LOCATION: IO28
IOC Input List:
IMUX : Q9
OE : EN_CP
IOC Output List:
PAD : APIN_A9
CELL EQUATIONS:
XPIN IO APIN_A9 LOCK 7;
OT11(APIN_A9, Q9, EN_CP);
STATISTICS FOR IOC IO23, USERNAME: RA8, ROUTED LOCATION: IO29
IOC Input List:
IMUX : Q8
OE : EN_CP
IOC Output List:
PAD : APIN_A8
CELL EQUATIONS:
XPIN IO APIN_A8 LOCK 8;
OT11(APIN_A8, Q8, EN_CP);
STATISTICS FOR IOC IO24, USERNAME: RA7, ROUTED LOCATION: IO23
IOC Input List:
IMUX : Q7
OE : EN_CP
IOC Output List:
PAD : APIN_A7
CELL EQUATIONS:
XPIN IO APIN_A7 LOCK 44;
OT11(APIN_A7, Q7, EN_CP);
STATISTICS FOR IOC IO25, USERNAME: RA6, ROUTED LOCATION: IO22
IOC Input List:
IMUX : Q6
OE : EN_CP
IOC Output List:
PAD : APIN_A6
CELL EQUATIONS:
XPIN IO APIN_A6 LOCK 43;
OT11(APIN_A6, Q6, EN_CP);
STATISTICS FOR IOC IO26, USERNAME: RA5, ROUTED LOCATION: IO21
IOC Input List:
IMUX : Q5
OE : EN_CP
IOC Output List:
PAD : APIN_A5
CELL EQUATIONS:
XPIN IO APIN_A5 LOCK 42;
OT11(APIN_A5, Q5, EN_CP);
STATISTICS FOR IOC IO27, USERNAME: RA4, ROUTED LOCATION: IO20
IOC Input List:
IMUX : Q4
OE : EN_CP
IOC Output List:
PAD : APIN_A4
CELL EQUATIONS:
XPIN IO APIN_A4 LOCK 41;
OT11(APIN_A4, Q4, EN_CP);
STATISTICS FOR IOC IO28, USERNAME: RA3, ROUTED LOCATION: IO19
IOC Input List:
IMUX : Q3
OE : EN_CP
IOC Output List:
PAD : APIN_A3
CELL EQUATIONS:
XPIN IO APIN_A3 LOCK 40;
OT11(APIN_A3, Q3, EN_CP);
STATISTICS FOR IOC IO29, USERNAME: RA2, ROUTED LOCATION: IO17
IOC Input List:
IMUX : Q2
OE : EN_CP
IOC Output List:
PAD : APIN_A2
CELL EQUATIONS:
XPIN IO APIN_A2 LOCK 38;
OT11(APIN_A2, Q2, EN_CP);
STATISTICS FOR IOC IO30, USERNAME: RA1, ROUTED LOCATION: IO18
IOC Input List:
IMUX : Q1
OE : EN_CP
IOC Output List:
PAD : APIN_A1
CELL EQUATIONS:
XPIN IO APIN_A1 LOCK 39;
OT11(APIN_A1, Q1, EN_CP);
STATISTICS FOR IOC IO31, USERNAME: RA0, ROUTED LOCATION: IO16
IOC Input List:
IMUX : Q0
OE : EN_CP
IOC Output List:
PAD : APIN_A0
CELL EQUATIONS:
XPIN IO APIN_A0 LOCK 37;
OT11(APIN_A0, Q0, EN_CP);
STATISTICS FOR RSTIN RESET, USERNAME: SYSGEN, ROUTED LOCATION: RST
RSTIN Input List:
PAD : !XRESET
RSTIN Output List:
OUT : !RESET
CELL EQUATIONS:
XPIN RST !XRESET LOCK 35;
IB11(!RESET, !XRESET);
STATISTICS FOR CLKIN Y0, USERNAME: CLK, ROUTED LOCATION: Y0
CLKIN Input List:
PAD : IPIN_CLK
CLKIN Output List:
OUT : CLK
CELL EQUATIONS:
XPIN CLK IPIN_CLK LOCK 11;
IB11(CLK, IPIN_CLK);
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© 2001 by Thomas Wagner, Mail: thomas at wagner-ibw dot de (aktuallisiert: 29.04.2001)